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NXP Semiconductors /MIMXRT1062 /USBPHY1 /TX_CLR

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Interpret as TX_CLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0D_CAL0RSVD00TXCAL45DN 0RSVD10TXCAL45DP 0RSVD20USBPHY_TX_EDGECTRL 0RSVD5

Description

USB PHY Transmitter Control Register

Fields

D_CAL

Resistor Trimming Code: 0000 = 0.16% 0111 = Nominal 1111 = +25%
RSVD0

Reserved. Note: This bit should remain clear.
TXCAL45DN

Decode to select a 45-Ohm resistance to the USB_DN output pin
RSVD1

Reserved. Note: This bit should remain clear.
TXCAL45DP

Decode to select a 45-Ohm resistance to the USB_DP output pin
RSVD2

Reserved.
USBPHY_TX_EDGECTRL

Controls the edge-rate of the current sensing transistors used in HS transmit
RSVD5

Reserved.

Links

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Register License

Copyright 2016-2019 NXP All rights reserved.

SPDX-License-Identifier: BSD-3-Clause

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data